The present invention relates to a semiconductor device and to a semiconductor device equipped with a plurality of wirings disposed in an interposer or a wiring substrate using an organic material as a dielectric, for example.
It has been known that a plurality of semiconductor chips are mounted over an interposer and sealed into a single package, followed by being provided as a semiconductor device. One example of such a semiconductor device is a so-called SIP (System In Package) or MCM (Multi-Chip Module).
On the other hand, there has recently been an increasing strong demand for speeding-up and high integration of a semiconductor device. To meet this demand, there has been considered that, for example, memory semiconductor chips (memory chips) are three-dimensionally (3-D) stacked on each other and logical semiconductor chips are mounted onto the same interposer, and the 3-D memory chips and the logical semiconductor chips (logical chips) are coupled in parallel therebetween by a large number of wirings disposed in the interposer. Since the three-dimensionally stacked semiconductor chips and the two-dimensionally arranged semiconductor chips are coupled therebetween, such a semiconductor device is also called a 2.5-dimensional (2.5-D) semiconductor device.
Amounting structure of a high-speed signal transmission wiring has been described in Patent Document 1.